1. Field of the Invention
The present invention relates to a trench gate-structured semiconductor device, such as a power MOSFET and an IGBT, and method of manufacturing the same.
2. Description of the Related Art
A semiconductor device having a trench gate structure such as a power MOSFET and an IGBT is possible to ensure a channel width even in a small area. This is advantageous to provide a fine patterned element, thereby achieving a reduced on-resistance.
To provide the trench gate-structured MOSFET with an improved switching speed, reduction in switching loss is required as well as reduction in on-resistance. Switching loss-determining factors include a gate-drain capacitance (hereinafter also referred to as a gate-collector capacitance in the case of IGBT) and a gate-source capacitance (hereinafter also referred to as a gate-emitter capacitance in the case of IGBT). Among those, the gate-drain capacitance exerts a large influence on the switching loss. A part of the gate-drain capacitance is formed between a lower surface of a gate electrode and an n−-type epitaxial layer opposing the lower surface, with a gate insulator interposed therebetween.
An increased thickness of the gate insulator on the bottom in a gate trench is effective to reduce the gate-drain capacitance (gate-collector capacitance). Such a semiconductor device has been known (JP-A 10-32331).
In the above-described prior art, ions of an n-type impurity are implanted into the bottom in the gate trench to form a high-concentration region in a semiconductor layer in the vicinity of the trench bottom. Thereafter, thermal oxidation is applied to form a thermal oxidized film on the trench bottom thicker than a thermal oxidized film on the side resulted from a difference in impurity concentration. In this case, the high-concentration region formed in the vicinity of the trench bottom causes a problem that a sufficient breakdown voltage of the element cannot be obtained.